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1/13 june 2004 high speed : f max = 79 mhz (typ.) at v cc = 6v low power dissipation: i cc =4 a(max.) at t a =25c high noise immunity: v nih = v nil = 28% v cc (min.) symmetrical output impedance: |i oh | = i ol = 4ma (min) balanced propagation delays: t plh ? t phl wide operating voltage range: v cc (opr) = 2v to 6v pin and function compatible with 54 series 390 device fully compliant with scc-9204-078 description the m54hc390 is an high speed cmos dual decade counter fabricated with silicon gate c 2 mos technology. this dual decade counter contains two independent ripple carry counters. each counter is composed of a divide by two and divide by five counter. the divide by two and divide by five counters can be cascaded to form dual decade, dual biquinary, or various combination up to a single divide by 100 counter. each 4-bit counter is incremented on the high to low transition (negative edge) of the clock input, and each has an independent clear input. when clear is set low all four bits of each counter are set to low. this enables count truncation and allows the implementation of divide by n counter configuration. all inputs are equipped with protection circuits against static discharge and transient excess voltage. m54hc390 rad hard dual decade counter pin connection order codes package fm em dilc m54hc390d m54hc390d1 fpc M54HC390K M54HC390K1 dilc-16 fpc-16 rev. 1
m54hc390 2/13 figure 1: iec logic symbols figure 2: input and output equivalent circuit table 1: pin description pin n symbol name and function 1, 15 1 clock a 2 clock b clock input divide by 2 section (high to low edge-triggered) 2, 14 1 clear 2 clear asynchronous master reset inputs 3, 5, 6, 7 1qa to 1qd flip flop outputs 4, 12 1 clock a 2 clock b clock input divide by 5 section (high to low edge-triggered) 13, 11, 10, 9 2qa to 2qd flip flop outputs 8 gnd ground (0v) 16 vcc positive supply voltage
m54hc390 3/13 table 2: truth table * : output qa is connected to input clock b for bcd count. ** : output qd is connected to input clock a for bi-quinary count. figure 3: block diagram count outputs bcd count* bi-quinary** qd qc qb qa qa qd qc qb 0 llllllll 1 lllhlllh 2 llhlllhl 3 llhhllhh 4 lhlllhll 5 lhlhhhl l 6lhhlhllh 7 lhhhhlhl 8 hlllhlhh 9 hllhhhll inputs outputs clock a clock b clear qaqbqcqd xxhllll x l binary count up x l quinary count up
m54hc390 4/13 figure 4: logic diagram this logic diagram has not be used to estimate propagation delays
m54hc390 5/13 figure 5: timing chart table 3: absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied symbol parameter value unit v cc supply voltage -0.5 to +7 v v i dc input voltage -0.5 to v cc + 0.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ik dc input diode current 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma p d power dissipation 300 mw t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 265 c
m54hc390 6/13 table 4: recommended operating conditions table 5: dc specifications symbol parameter value unit v cc supply voltage 2 to 6 v v i input voltage 0 to v cc v v o output voltage 0 to v cc v t op operating temperature -55 to 125 c t r , t f input rise and fall time v cc = 2.0v 0 to 1000 ns v cc = 4.5v 0 to 500 ns v cc = 6.0v 0 to 400 ns symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh high level output voltage 2.0 i o =-20 a 1.9 2.0 1.9 1.9 v 4.5 i o =-20 a 4.4 4.5 4.4 4.4 6.0 i o =-20 a 5.9 6.0 5.9 5.9 4.5 i o =-4.0 ma 4.18 4.31 4.13 4.10 6.0 i o =-5.2 ma 5.68 5.8 5.63 5.60 v ol low level output voltage 2.0 i o =20 a 0.0 0.1 0.1 0.1 v 4.5 i o =20 a 0.0 0.1 0.1 0.1 6.0 i o =20 a 0.0 0.1 0.1 0.1 4.5 i o =4.0 ma 0.17 0.26 0.33 0.40 6.0 i o =5.2 ma 0.18 0.26 0.33 0.40 i i input leakage current 6.0 v i = v cc or gnd 0.1 1 1 a i cc quiescent supply current 6.0 v i = v cc or gnd 44080 a
m54hc390 7/13 table 6: ac electrical characteristics (c l = 50 pf, input t r = t f = 6ns) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t tlh t thl output transition time 2.0 30 75 95 110 ns 4.5 8 15 19 22 6.0 7 13 16 19 t plh t phl propagation delay time (clock a - qa) 2.0 42 120 150 180 ns 4.5 14 24 30 36 6.0 12 20 26 31 t plh t phl propagation delay time (clock a-qb,qd ) 2.0 45 120 150 180 ns 4.5 15 24 30 36 6.0 13 20 26 31 t plh t phl propagation delay time (clock a - qc) 2.0 qa connected to ckb 108 280 350 420 ns 4.5 36 56 70 84 6.0 31 48 60 71 t plh t phl propagation delay time (clock b - qc) 2.0 72 185 230 280 ns 4.5 24 37 46 56 6.0 20 31 39 48 t phl propagation delay time (clear - qn) 2.0 45 125 155 190 ns 4.5 15 25 31 38 6.0 13 21 26 32 f max maximum clock frequency (clock a - qa) 2.0 8.4 17 6.8 5.6 mhz 4.5 42653428 6.0 50794033 f max maximum clock frequency (clock b - qb) 2.0 8.4 17 6.8 5.6 mhz 4.5 42673428 6.0 50794033 t w(h) t w(l) minimum pulse width (clock ) 2.0 24 75 95 110 ns 4.5 6 15 19 22 6.0 5 13 16 19 t w(h) minimum pulse width (clear) 2.0 24 75 95 110 ns 4.5 6 15 19 22 6.0 5 13 16 19 t rem minimum removal time 2.0 25 30 35 ns 4.5 5 6 7 6.0 5 5 6
m54hc390 8/13 table 7: capacitive characteristics 1) c pd is defined as the value of the ic?s internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average operating current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc figure 6: test circuit c l = 50pf or equivalent (includes jig and probe capacitance) r t = z out of pulse generator (typically 50 ? ) figure 7: waveform - clock waveform (f=1mhz; 50% duty cycle) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 510 10 10pf c pd power dissipation capacitance (note 1) 84 pf
m54hc390 9/13 figure 8: waveform - propagation delay times, minimum pulse width and removal time (f=1mhz; 50% duty cycle)
m54hc390 10/13 dim. mm. inch min. typ max. min. typ. max. a 2.1 2.71 0.083 0.107 a1 3.00 3.70 0.118 0.146 a2 0.63 0.88 1.14 0.025 0.035 0.045 b 1.82 2.39 0.072 0.094 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 d 20.06 20.32 20.58 0.790 0.800 0.810 e 7.36 7.62 7.87 0.290 0.300 0.310 e 2.54 0.100 e1 17.65 17.78 17.90 0.695 0.700 0.705 e2 7.62 7.87 8.12 0.300 0.310 0.320 f 7.29 7.49 7.70 0.287 0.295 0.303 i 3.83 0.151 k 10.90 12.1 0.429 0.476 l 1.14 1.5 0.045 0.059 dilc-16 mechanical data 0056437f
m54hc390 11/13 dim. mm. inch min. typ max. min. typ. max. a 6.75 6.91 7.06 0.266 0.272 0.278 b 9.76 9.94 10.14 0.384 0.392 0.399 c 1.49 1.95 0.059 0.077 d 0.102 0.127 0.152 0.004 0.005 0.006 e 8.76 8.89 9.01 0.345 0.350 0.355 f 1.27 0.050 g 0.38 0.43 0.48 0.015 0.017 0.019 h 6.0 0.237 l 18.75 22.0 0.738 0.867 m 0.33 0.38 0.43 0.013 0.015 0.017 n 4.31 0.170 fpc-16 mechanical data 0016030e 1 8 16 f g d h a b m c n h 9 e l
m54hc390 12/13 table 8: revision history date revision description of changes 16-jun-2004 1 first release
m54hc390 13/13 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com

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